1. Field of the Invention
The present invention relates to a direct sequence CDMA receiver, and more particularly to a receiver of the CDMA (Code Division Multiple Access) system that performs despreading demodulation using a spreading code that is contained in the received signal.
2. Description of the Related Art
CDMA is a method of transmitting by spreading information data into a broadband signal by means of a spreading code having a spread rate (=number of chips/symbols) pg. On the receiving side, the leading position of the spreading code contained within the received signal must be detected and despreading demodulation must be performed using the spreading code that is synchronized with this leading position.
To achieve synchronization on the receiving side, correlation values with the spreading code are found using a portion having a known data sequence, such as pilot symbols or a preamble data sequence that is periodically inserted, and timings are found for which these correlation values are high.
FIG. 1 shows the configuration of a receiver. In the receiver in FIG. 1, a signal received by an antenna (not shown) is demodulated to convert to a baseband signal, and which is sampled at twice the chip rate by A/D (analog/digital) converter 41. Correlation values between the spreading code and the sampled received data are then found by matched filter 42.
In delay profile production unit 43, delay profiles are sought from the correlation values of the sampling interval of received data obtained by matched filter 42. In timing detector 44, prescribed locations are selected in descending order from the largest value among the correlation values of this delay profile, and timing signals are generated based on the timings of each of the selected values. Then, in despreader 45-47, the received data are despread using a spreading code that is synchronized with these timing signals, and data are obtained through RAKE/diversity mixing at mixer 48.
Referring now to FIG. 2b, matched filter 42 comprises received signal shift register 51, spreading code register 52, multipliers 53, and adder 54.
Received signal shift register 51 receives and shifts the received signal. Spreading code register 52 sets a spreading code sequence of the same bit length as this received signal shift register 51. Multipliers 53 multiply the values of received signal shift register 51 and spreading code register 52. Adder 54 adds the output signals of multipliers 53.
As shown in FIG. 2a, the received signal sequence is constituted by a known portion (pilot portion) and a data portion that is not know, and is sampled at, for example, twice the chip period of the spreading code, and through A/D conversion, becomes a digital value between xe2x88x921.0-+1.0. In this case, received signal shift register 51 shifts the received signal each xc2xd chip period in accordance with the sampling period of the received signal.
The output signals of each stage of this received signal shift register 51 and each bit of the spreading code sequence set by spreading code register 52 are multiplied by multipliers 53 for each shift, and the results of multiplication are added in adder 54 to produce the correlation values. If the size of these correlation values is arranged on the time axis as shown in FIG. 3, a delay profile is obtained in which the correlation values increase at xcfx840, xcfx841, and xcfx842.
The delay profile varies with fading or movement of a mobile terminal and has a plurality of maximum values, and the timing of which is extracted by timing detector 44. If the delay profile is represented as shown in FIG. 3, the correlation values in the delay profile are selected in descending order of size and the timing at which each of these correlation values was obtained is reported to despreaders 45-47 by means of respectively different timing signals.
Japanese Patent Laid-open No. 178386/98 and Japanese Patent Laid-open No. 336072/98 each disclose an example of the aforementioned CDMA receiver.
In a CDMA receiver of the aforementioned prior art, the spreading code and received data must be reliably and accurately synchronized, and it is well known that reception characteristics deteriorate drastically with a variance in synchronization of just xc2xc chip. The deterioration is particularly noticeable in the case of a low spreading rate, such as in high-speed data transfer.
In view of the foregoing problems, it is an object of the present invention to provide a direct sequence CDMA receiver that can accurately acquire synchronization of despreading timing without increasing the sampling rate of the A/D conversion of received data, and to thereby improve reception characteristics.
The direct sequence CDMA receiver according to the present invention comprises an analog/digital conversion means, a matched filter, and a delay profile production means.
The analog/digital conversion means samples, at twice the chip rate, a baseband signal obtained by demodulating a signal received by way of an antenna. The matched filter acquires correlation values of the received data sampled by the analog/digital conversion means and a spreading code while time-shifting said received data. The delay profile production means interpolates correlation values found by the matched filter, and finds the delay profiles from the interpolated correlation values. That is, when establishing synchronization on the receiving side, correlation values are found between a spreading code composed of 1/xe2x88x921 data and then received data, and delay profile is produced using the correlation values of the sampling period. The timings of peaks in the correlation values in the delay profile are then obtained to realize synchronization between the received data and the spreading code. The accuracy of synchronization is therefore dependent on the sampling interval of the received data.
In contrast, the direct sequence CDMA receiver according to the present invention inputs a signal received by an antenna and converted to a baseband signal, and samples the input at twice the chip rate in an A/D converter. Thereafter, correlation values with the received data are then found by means of the matched filter using the 1/xe2x88x921 spreading code and are interpolated by means of, for example, a filter in the delay profile production means having an interpolation function. These interpolated data are then used to provide delay profiles as a continuous characteristic. As a result, the timing of peaks in the delay profiles can also be obtained with higher accuracy in a timing detector irrespective of a sampling period.
In addition, the correlation values in a delay profile are selected in descending order of size, the timings at which these correlation values were obtained are extracted, and respectively different timing signals are supplied to despreader. The despreaders are not limited to three in number, and may one or more.
In the despreaders, the spreading code is interpolated to synchronize with these timing signals, and the received data are despread using the interpolated values. The despread signals are RAKE/diversity mixed in a mixer to obtain data.
Synchronization of despread timing can thus be accurately achieved without increasing the A/D conversion sampling rate of the received data, thereby improving reception characteristics.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate examples of the present invention.